طراحی مدار 3bit mdac برای طبق? اول 12 bit, 200 ms/s pipelined adc در پروس? 0.35um cmos

thesis
abstract

3bit از مجموع 12 bit کل adc در طبق? این mdac تولید می شود و برای این منظور از سیستم 2.5bit استفاده شده است که 1bit از 3bit تولید شده صرف error correction می شود و بعد از جمع با بیت طبق? بعد 1bit تولید می کند به همین دلیل مانند 0.5bit عمل می کند. همچنین خطای گین محدود اپ امپ را با استفاده از تغییر نسبت خازن فیدبک به خازن واحد اصلاح می کنیم که در این روش درصدی برای تغییر گین حلقه باز اپ امپ به طوری که موجب خطای غیر مجاز نشود نیز در نظر می گیریم و نیز تغییر نسبت خازن با توجه به دقت مچینگ خازن که قابلیت پشتیبانی برای تولید 10bit را دارد انجام شده است. برای طراحی از تکنولوژی 0.35um digital cmos استفاده شده است.

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